PIC18F2450/4450
DS39760A-page 52
Advance Information
2006 Microchip Technology Inc.
UEP8
2450
4450
---0 0000
---u uuuu
UEP7
2450
4450
---0 0000
---u uuuu
UEP6
2450
4450
---0 0000
---u uuuu
UEP5
2450
4450
---0 0000
---u uuuu
UEP4
2450
4450
---0 0000
---u uuuu
UEP3
2450
4450
---0 0000
---u uuuu
UEP2
2450
4450
---0 0000
---u uuuu
UEP1
2450
4450
---0 0000
---u uuuu
UEP0
2450
4450
---0 0000
---u uuuu
UCFG
2450
4450
00-0 0000
uu-u uuuu
UADDR
2450
4450
-000 0000
-uuu uuuu
UCON
2450
4450
-0x0 000-
-uuu uuu-
USTAT
2450
4450
-xxx xxx-
-uuu uuu-
UEIE
2450
4450
0--0 0000
u--u uuuu
UEIR
2450
4450
0--0 0000
u--u uuuu
UIE
2450
4450
-000 0000
-uuu uuuu
UIR
2450
4450
-000 0000
-uuu uuuu
UFRMH
2450
4450
---- -xxx
---- -uuu
UFRML
2450
4450
xxxx xxxx
uuuu uuuu
TABLE 4-4:
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET
Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
3:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
4:
See Table 4-3 for Reset value for specific condition.
5:
PORTA<6>, LATA<6> and TRISA<6> are enabled depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read ‘0’.
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